The specification relates to performing vector reductions in hardware.
Generally, a vector reduction is an operation performed on elements of an input vector to produce a scalar output, or an output vector that has a smaller dimensionality than the input vector. For example, a summation vector reduction operation may produce a scalar output that is equal to a sum of the elements of an input vector. In some examples, respective vector reduction operations may be performed on multiple segments of an input vector. A segmented vector reduction operation produces an output vector in which each element is a reduction of a segment of the input vector. For example, a segmented summation vector reduction operation may produce an output vector in which each element is a sum of a segment of elements of the input vector.